
Jung Kyu Chae
Core Qualifications ---------------------------------------------------------------------------------------------- Hardware Engineering: Design Technology Co-optimization for advanced nodes (5nm and beyond, Gate-all-around) - Technology definitions, Standard cell architecture design,... | South Korea
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Jung Kyu Chae’s Emails ju****@sa****.com
Jung Kyu Chae’s Phone Numbers No phone number available.
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Jung Kyu Chae’s Location South Korea
Jung Kyu Chae’s Expertise Core Qualifications ---------------------------------------------------------------------------------------------- Hardware Engineering: Design Technology Co-optimization for advanced nodes (5nm and beyond, Gate-all-around) - Technology definitions, Standard cell architecture design, PPA estimation Expert on the development and quality assurance of standard cell library Excellent experience in standard cell design at deep submicron technology (5nm and beyond) Excellent experience in spice simulation, standard cell characterization, custom layout, DRC/LVS verification, timing analysis, on-chip variation and PDK Good knowledge of CMOS process, device model and so on Strong skills in programming C/C++, Python, Perl, Tcl/Tk, Shell, and SKILL Excellent experience in digital design flow from RTL design to P&R, Sign-off - development of the advanced design flow and timing analysis method Excellent experience with different foundries (Intel, TSMC, STMicroelectronics, Samsung, GF), IP vendor (ARM), CAD vendors (Cadence, Synopsys, Mentor) and Fabless (Qualcomm) ---------------------------------------------------------------------------------------------- Software Engineering: Good Knowledge of Machine Learning and Deep Learning Nanodegree "Machine Learning Engineer" Strong skills in programming Python, Java, TensorFlow, Keras, SQL, XML Full stack design Strong skills in Kotlin, ReactNative, Flutter (Dart), HTML, Node.js, No SQL, MongoDB, AdobeXD ---------------------------------------------------------------------------------------------
Jung Kyu Chae’s Current Industry Intel
Jung
Kyu Chae’s Prior Industry
Isdl
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Lip6
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Stmicroelectronics
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Lg Electronics
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Imec
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Samsung Electronics
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Intel
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Work Experience

Intel
Senior Foundry Product Engineer, Ph.D. (Design Flow / Ppa / Dtco Expert)
Sun Aug 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Samsung Electronics
Staff Engineer, Ph.D. (Dtco Engineer)
Sat Sep 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jul 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Imec
Senior R&D Engineer, Ph.D. (Dtco Engineer)
Sun Oct 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Aug 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Lg Electronics
Senior R&D Engineer, Ph.D. (Standard Cell Designer)
Mon Sep 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Aug 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
Stmicroelectronics
Cad Engineer, Ph.D. Candidate (R&D Engineer)
Tue Mar 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jun 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Lip6
Analog Circuit Designer (Intern)
Thu Apr 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Dec 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)
Isdl
Custom Layout Designer (Intern)
Wed Apr 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jun 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time)